
use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
    blocks: &[Block {
        name: "Dbgmcu",
        extends: None,
        description: Some("Microcontroller Debug Unit"),
        items: &[
            BlockItem {
                name: "idcoder",
                description: Some("Identity Code Register"),
                array: None,
                byte_offset: 0x0,
                inner: BlockItemInner::Register(Register {
                    access: Access::Read,
                    bit_size: 32,
                    fieldset: Some("Idcoder"),
                }),
            },
            BlockItem {
                name: "cr",
                description: Some("Configuration Register"),
                array: None,
                byte_offset: 0x4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr"),
                }),
            },
            BlockItem {
                name: "apb1fzr1",
                description: Some("CPU1 APB1 Peripheral Freeze Register 1"),
                array: None,
                byte_offset: 0x3c,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Apb1fzr1"),
                }),
            },
            BlockItem {
                name: "c2apb1fzr1",
                description: Some("CPU2 APB1 Peripheral Freeze Register 1 [dual core device"),
                array: None,
                byte_offset: 0x40,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("C2apb1fzr1"),
                }),
            },
            BlockItem {
                name: "apb1fzr2",
                description: Some("CPU1 APB1 Peripheral Freeze Register 2"),
                array: None,
                byte_offset: 0x44,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Apb1fzr2"),
                }),
            },
            BlockItem {
                name: "c2apb1fzr2",
                description: Some("CPU2 APB1 Peripheral Freeze Register 2 [dual core device"),
                array: None,
                byte_offset: 0x48,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("C2apb1fzr2"),
                }),
            },
            BlockItem {
                name: "apb2fzr",
                description: Some("CPU1 APB2 Peripheral Freeze Register"),
                array: None,
                byte_offset: 0x4c,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Apb2fzr"),
                }),
            },
            BlockItem {
                name: "c2apb2fzr",
                description: Some("CPU2 APB2 Peripheral Freeze Register [dual core device"),
                array: None,
                byte_offset: 0x50,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("C2apb2fzr"),
                }),
            },
        ],
    }],
    fieldsets: &[
        FieldSet {
            name: "Apb1fzr1",
            extends: None,
            description: Some("CPU1 APB1 Peripheral Freeze Register 1"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "tim2",
                    description: Some("TIM2 stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rtc",
                    description: Some("RTC stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "wwdg",
                    description: Some("WWDG stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "iwdg",
                    description: Some("IWDG stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c1",
                    description: Some("I2C1 SMBUS timeout stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c2",
                    description: Some("I2C2 SMBUS timeout stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c3",
                    description: Some("I2C3 SMBUS timeout stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "lptim1",
                    description: Some("LPTIM1 stop in CPU1 debug"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Apb1fzr2",
            extends: None,
            description: Some("CPU1 APB1 Peripheral Freeze Register 2"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lptim2",
                    description: Some("LPTIM2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "lptim3",
                    description: Some("LPTIM3"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Apb2fzr",
            extends: None,
            description: Some("CPU1 APB2 Peripheral Freeze Register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "tim1",
                    description: Some("TIM1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim16",
                    description: Some("TIM16"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim17",
                    description: Some("TIM17"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "C2apb1fzr1",
            extends: None,
            description: Some("CPU2 APB1 Peripheral Freeze Register 1 [dual core device"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "tim2",
                    description: Some("TIM2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rtc",
                    description: Some("RTC"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "iwdg",
                    description: Some("IWDG"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c1",
                    description: Some("I2C1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c2",
                    description: Some("I2C2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c3",
                    description: Some("I2C3"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "lptim1",
                    description: Some("LPTIM1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "C2apb1fzr2",
            extends: None,
            description: Some("CPU2 APB1 Peripheral Freeze Register 2 [dual core device"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lptim2",
                    description: Some("LPTIM2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "lptim3",
                    description: Some("LPTIM3"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "C2apb2fzr",
            extends: None,
            description: Some("CPU2 APB2 Peripheral Freeze Register [dual core device"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "tim1",
                    description: Some("TIM1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim16",
                    description: Some("TIM16"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim17",
                    description: Some("TIM17"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cr",
            extends: None,
            description: Some("Configuration Register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "dbg_sleep",
                    description: Some("Allow debug in SLEEP mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "dbg_stop",
                    description: Some("Allow debug in STOP mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "dbg_standby",
                    description: Some("Allow debug in STANDBY mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Idcoder",
            extends: None,
            description: Some("Identity Code Register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "dev_id",
                    description: Some("Device ID"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rev_id",
                    description: Some("Revision"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
                    bit_size: 16,
                    array: None,
                    enumm: None,
                },
            ],
        },
    ],
    enums: &[],
};
